ثبت نام ورکشاپ آنلاین و رایگان به ارزش 990 $ از AMD با موضوع مدارهای واسط حافظه :
This week’s online workshop - Designing with the Versal Adaptive SoC: Memory Interfaces
📅December 19-20
⏰Available worldwide
In partnership with Core-Vision B.V. and Technically Speaking, Doulos is delighted to invite you to attend this AMD sponsored workshop (worth $990) for FREE!
Presented in 2 half-day sessions by an AMD Authorized Training Instructor, with live Q&A, this workshop provides a system-level understanding of AMD Versal™ adaptive SoC memory interfaces.
Workshop overview:
✅ You will learn about: Memory controller architecture, IP generation, simulation, and implementation are covered as well as additional info on PCB design issues.
✅ Topics include: DDRMC building blocks, ports and attributes, design through to implementation using the hardened memory controller, DDR4 & LPDDR4 debugging, performance tuning and board design requirements.
✅ It is live and interactive: The workshop is designed to maximize individual engagement and learning. You are encouraged to informally ask pertinent questions throughout, to actively participate in the learning process.
✅ Attending is easy! The workshop has been created to be accessible by a wide audience with standard technology requirements.
https://www.doulos.com/events/workshops/designing-with-the-versal-adaptive-soc-memory-interfaces/
@Taksuntec
This week’s online workshop - Designing with the Versal Adaptive SoC: Memory Interfaces
📅December 19-20
⏰Available worldwide
In partnership with Core-Vision B.V. and Technically Speaking, Doulos is delighted to invite you to attend this AMD sponsored workshop (worth $990) for FREE!
Presented in 2 half-day sessions by an AMD Authorized Training Instructor, with live Q&A, this workshop provides a system-level understanding of AMD Versal™ adaptive SoC memory interfaces.
Workshop overview:
✅ You will learn about: Memory controller architecture, IP generation, simulation, and implementation are covered as well as additional info on PCB design issues.
✅ Topics include: DDRMC building blocks, ports and attributes, design through to implementation using the hardened memory controller, DDR4 & LPDDR4 debugging, performance tuning and board design requirements.
✅ It is live and interactive: The workshop is designed to maximize individual engagement and learning. You are encouraged to informally ask pertinent questions throughout, to actively participate in the learning process.
✅ Attending is easy! The workshop has been created to be accessible by a wide audience with standard technology requirements.
https://www.doulos.com/events/workshops/designing-with-the-versal-adaptive-soc-memory-interfaces/
@Taksuntec
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